MDA relies heavily on simulation to assess the functionality and capabilities of the ballistic missile defense system. In particular, hardware-in-the-loop (HWIL), or equivalently processor in the loop (PIL) simulation is often employed to ensure high confidence in simulation outcomes through the use of the highest possible fidelity models. The cost and complexity of HWIL simulation, however, naturally limits the scope of exercises that can be conducted, necessitating the use of constructive simulation surrogates to augment the test event.

Such a mix of HWIL and digital constructive simulation poses challenges for the simulation architecture and the achievement of the necessary interoperability. This paper addresses the techniques in use today and under development by MDA to improve the integration of HWIL and digital simulation to satisfy the growing requirements for test support. Specific topics addressed include: integrating discrete-event and frame-based time-stepped models, priority processing, and algorithms for graceful degradation in short-term overload situations.