Military simulators require very large amounts of high speed computational power Traditionally, the need has been met by assemblages of minicomputers. The laboratory project described was undertaken to explore the feasibility of employing low-cost microcomputers instead. The paper details the considerations dictating the architectural design, describes the partitioning tool used to assign modules to processors, and discusses methods employed to overcome real-time synchronization problems. Recommendations are presented for system features which would result in the flexibility and expandability required for this application.